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DG485
Vishay Siliconix
Octal Analog Switch Array
FEATURES
Low On-Resistance: 55 W Rail-to-Rail Analog Input Range Serial Interface Low-Power--PD: 35 nW TTL and CMOS Compatible Any Combination of 8 SPST to the Output D High Speed--tON: 170 ns D D D D D D
BENEFITS
D Low Signal Distortion D Devices Can Be Chained for System Expansion D Reduced Board Space D Reduced Switch Errors D Reduced Power Supply Requirements D Simple Interfacing
APPLICATIONS
D Audio Switching and Routing D Audio Teleconferencing D Data Acquisition and Industrial Process Control D Battery Powered Remote Systems D Automotive, Avionics and ATE Systems D Summing Amplifiers
DESCRIPTION
The DG485 is an analog switch array consisting of eight SPST switches connected to a common output. This device may be used as an 8-channel multiplexer in serial control applications. Any, all or none of the eight switches may be closed at any given time. Combining low on-resistance (rDS(on) 55 W, typ.) and fast switching (tON: 170 ns, typ.), the DG485 is ideally suited for data acquisition, process control, communication, and avionic applications. serial output (DOUT) allow daisy chaining of multiple arrays for large systems.
Built on the Vishay Siliconix high voltage silicon gate process the DG485 has a wide 44-V power supply voltage rating. An epitaxial layer prevents latchup.
Control data is input serially into the shift register with each clock pulse. The shift register contents can be latched-in (via LD) at any point into an octal latch which in turn controls all switches. RS resets the shift register, forcing all latch inputs to a low condition (all switches off). The serial input (DIN) and
Each channel conducts equally well in either direction when on and blocks up to rail-to-rail voltages when off.
For additional information please refer to application note AN204.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line LD VL S4 S3 S2 S1 V+ DIN CLK RS GND D S5 S6 S7 S8 V- DOUT S4 S3 S2 S1 V+ 4 5 6 7 8 Shift Register/Latches 9 D IN 10 11 12 13 CLK DOUT NC V- 18 17 16 15 14 D S5 S6 S7 S8 PLCC and LCC GND www.vishay.com S FaxBack 408-970-5600 VL NC 1 RS LD 2
1 2 3 4 5 6 7 8 9 Shift Register Latches
18 17 16 15 14 13 12 11 10
3
20 19
Top View Top View Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
TRUTH TABLES AND ORDERING INFORMATION
TRUTH TABLE
RS
1 1 1 0 X
DUAL IN LINE PACKAGE
D1
0 1 D1 0
TRUTH TABLE
LD* Dn
0 1 Dn *LD Input Level Triggered
PLCC & LCC PACKAGES
Ln
0 1 Ln
CLK*
DIN
0 1 X X
Dn
Dn-1 Dn-1 Dn (No Change) 0
SWn
OFF ON (No Change)
*CLK Input Edge Triggered
ORDERING INFORMATION
Temp Range
-40 to 85_C 20-Pin PLCC -55 to 125_C LCC-20 DG485DN DG485AZ/883
Package
18-Pin Plastic DIP
Part Number
DG485DJ
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to V- V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Digital Inputsa VS, VD . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2 V to (V+) + 2 V or 30 mA, whichever occurs first Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Current, S or D (Pulsed 1 ms, 10% duty cycle) . . . . . . . . . . . . . . . . . . 100 mA Storage Temperature (AZ Suffix) . . . . . . . . . . . . . . . . . . -65 to 150_C (DJ, DN Suffix) . . . . . . . . . . . . . . -65 to 125_C Power Dissipation (Package)b 18-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW 20-Pin PLCC, LCCd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW Notes: a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 6 mW/_C above 75_C. d. Derate 10 mW/_C above 75_C.
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Document Number: 70065 S-52433--Rev. E, 06-Sep-99
DG485
Vishay Siliconix
SPECIFICATIONSa
Test Conditions Unless Otherwise Specified Parameter Analog Switch
Analog Signal Rangee Drain-Source On-Resistance Delta Drain-Source On-Resistanceg Switch Off Leakage Current Lk C t VANALOG rDS(on) DrDS(on) IS(off) ID(off) V+ = 13.5 V, V- = -13.5 V IS = -5 mA, VD = "10 V Full Room Full Room Room Full Room Full Room Full Room 55 6 0.01 0.1 0.11 -1 -20 -10 -200 -20 -500 1 20 10 200 20 500 -1 -10 -10 -50 -20 -50 1 10 10 50 20 50 -15 15 85 125 -15 15 85 125 V W %
A Suffix
-55 to 125_C
D Suffix
-40 to 85_C
Symbol
V+ = 15 V, V- = -15 V VL = 5 V, VIN = 2.4 V, 0.8 Vf
Tempb
Typc
Mind
Maxd Mind
Maxd Unit
, V+ = 16.5 V, V- = -16.5 V VD = #15.5 V VS = "15.5 V 15 5 V, 15 5 V" = "16.5 V VS = VD = "15.5 V One Switch At A Time V" = "16.5 V, VS = VD = "15.5 V All Switches On
nA A
Channel On Leakage Current Lk C t
ID(on)
0.2
Input
Input Current with VIN Low Input Current with VIN High IIL IIH VIN Under Test = 0.8 V All Other = 2.4 V VIN Under Test = 2.4 V All Other = 0.8 V Room Full Room Full -0.0001 0.0001 -1 -5 -1 -5 1 5 1 5 -1 -5 -1 -5 1 5 1 5 mA
Serial Data Output
Output Voltage with VIN Low - DOUT Output Voltage with VIN High - DOUT VOL VOH IO = 1.6 mA, V+ = 4.5 V IO = -80 mA, V+ = 16.5 V VL = 4.75 V Full Full 0.25 4.4 2.7 0.4 2.7 0.4 V
Dynamic Characteristics
Turn-On Time Turn-Off Time Data Setup Time Data Hold Time LOAD Hold Time RESET Hold Time RESET " to CLOCK " Delay Charge Injection Off Isolatione Maximum Clock Frequency tON tOFF tDS See Figures 4, 8 tDH tLH tRH tDRC Q OIRR fCLK VS = 0 V, CL = 1,000 pF Any One Channel RL = 50 W, CL = 5 pF, f = 1 MHz See Figure 9 See Figures 5 8 S Fi 5, VS = "10 V See Figures 1, 8 VS = "10 V See Figures 2, 3, 8 Room Full Room Full Room Full Room Full Room Full Room Full Room Full Room Room Room 17 -75 10 170 150 40 60 40 60 100 150 100 150 40 60 200 275 200 275 40 60 40 60 100 150 100 150 40 60 pC dB MHz ns 200 275 200 276
Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
SPECIFICATIONSa
Test Conditions Unless Otherwise Specified Parameter Symbol
V+ = 15 V, V- = -15 V VL = 5 V, VIN = 2.4 V, 0.8 Vf
A Suffix
-55 to 125_C
D Suffix
-40 to 85_C
Tempb
Typc
Mind
Maxd Mind
Maxd Unit
Dynamic Characteristics (Cont'd)
Source Off Capacitancee Drain Off Capacitancee CS(off) CD(off) Vgen = 0 V, Rgen = 0 W, f = 1 MHz One Channel On Vgen = 0 V, Rgen = 0 W, f = 1 MHz All Channels On Vgen = 0 V, Rgen = 0 W, f = 1 MHz , Room Room Room Room 7 43 53 122 pF F
On-State Capacitancee
CD(on)
Power Supplies
Positive Supply Current Negative Supply Current Logic Supply Current Ground Current I+ I- IL IGND V+ 16 5 V V V = 16.5 V, V- = -16.5 V 16 5 VIN = 0 or 5 V, VL = 5.25 V DOUT Open Room Full Room Full Room Full Room Full 0.001 -0.001 0.001 -0.001 -3 -10 -3 -10 3 10 -3 -10 3 10 -3 -10 3 10 3 10
A mA
Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. r DS(on) MAX - r DS(on) MIN g. For each V : Dr + D DS(on) r AVE
DS(on)
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
1 mA 100 nA 10 nA GND
Supply Currents vs. Temperature
r DS(on) Drain-Source On-Resistance ( W ) - V+ = 15 V V- = -15 V VL = 5 V 160 140 120 100 80 60 40 20 0 -30 -10 10 30 50 70 90 110 130 -20
rDS(on) vs. VD and Power Supply Voltage
VL = 5 V IS = -5 mA
IPOS 1 nA 100 pA 10 pA 1 pA 0.1 pA -50 IGND INEG
IL
"5 V
I+, I-, I
"8 V "10 V
"12 V "15 V
"20 V
-15
-10
-5
0
5
10
15
20
Temperature (_C) www.vishay.com S FaxBack 408-970-5600
VD - Drain Voltage (V) Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
rDS(on) vs. VD and Unipolar Power Supply Voltage
400 r DS(on) Drain-Source On-Resistance ( W ) - 350 300 250 200 150 100 50 0 0 2 4 6 8 10 12 14 16 18 20 VD - Drain Voltage (V) 8V 10 V 12 V 15 V 20 V V+ = 5 V r DS(on) Drain-Source On-Resistance ( W ) - V- = 0 V VL = 5 V IS = -5 mA 100 90 80 70 60 50 40 30 20 10 0 -15 -10 -5 0 5 10 15 VD - Drain Voltage (V) V+ = 15 V V- = -15 V VL = 5 V IS = -5 mA -55_C 25_C 125_C
rDS(on) vs. VD and Temperature
Channel On/Off Leakage Currents vs. Analog Voltage
60 40 20 IS(off) I D, I S 0 -20 -40 ID(off) ID(on) V+ = 15 V V- = -15 V VL = 5 V
1 mA 100 nA 10 nA 1 nA 100 pA 10 pA 1 pA
Channel On/Off Leakage Currents vs. Temperature
V+ = 15 V V- = -15 V VL = 5 V VS or VD = - 14 V
I S, I D , I S + D (pA)
ID(on)
IS(off)
ID(off)
-60 -80 -15 -10 -5 0 5 10 15
0.1 pA 0.01 pA -50 -30 -10 10 30 50 70 90 110 130
VD or VS - Drain or Source Voltage (V)
Temperature (_C)
Switching Threshold vs. Power Supply Voltage and VL
3.0 5V 6V 2.0 V TH (V) VL = 7 V
RF Characteristics
-140 -120 -100 OIRR -80 (dB) XTALK
2.5
1.5 4V 1.0
-60 -40 V+ = 15 V V- = -15 V VL = 5 V See Figures 9, 10
0.5
-20 0 5 6 7 8 9 10 11 12 13 14 15 1k 10 k 100 k f - Frequency (Hz) www.vishay.com S FaxBack 408-970-5600 1M 10 M V+ Supply (V)
0
Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Currents vs. Switching Frequency
10 mA V+ = 15 V V- = -15 V VL = 5 V VIN = 3 V In 100 mA I+, I-, I GND IL C S, D (pF)
Source/Drain On Capacitance vs. Analog Voltage
180 160 140 120 100 80 60 40 CD(on) (Channel 1 On Only) V+ = 15 V V- = -15 V VL = 5 V CD(on) (All Channels On)
1 mA
10 mA
Ip
1 mA
100 nA
10 nA 100 1k 10 k f - Frequency (Hz) 100 k 1M
-15
-10
-5
0
5
10
15
VANALOG - Analog Voltage (V)
Source/Drain Off Capacitance vs. Analog Voltage
70 60 50 C S, D (pF) 40 30 20 10 0 -15 -10 -5 0 5 10 15 CS(off) V+ = 15 V V- = -15 V VL = 5 V CD(off) Q (pC) 55
Charge Injection vs. Analog Voltage
V+ = 15 V V- = -15 V VL = 5 V CL = 1 nF
45
35
25
15
5
-5 -15 -10 -5 0 5 10 15
VANALOG - Analog Voltage (V)
VS - Source Voltage (V)
TIMING DIAGRAMS
3V 50% LD 0V VS 0V tON Repeat for All Channels 90% VD LD 3V 50% 0V VS 0V tOFF Repeat for All Channels 90%
VD
FIGURE 1. tON from LD
3V 50% RS 0V VS VD 0V tOFF 90%
FIGURE 2. tOFF from LD
FIGURE 3. tOFF from RS
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DG485
Vishay Siliconix
TIMING DIAGRAMS
CLOCK
50%
DATA
50% tDH tDS
FIGURE 4. Data Setup and Hold Time
CLOCK
RS
LOAD
tLH
tRH
tDRC
FIGURE 5. Timing Relationships
RS DIN CLK LD S1 S2 S3 S4 S5 S6 S7 S8 DOUT S1 - S8 and DOUT are expected output with the drain connected high. The sources require pull-down of 1 kW.
FIGURE 6.
Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+ VL V+ RS RS D1 S8 DIN Dn Shift Register CLK CLK D8 LD V+ Octal Latch Level Shift/ Drive V- S1
DOUT V+ LD
D
GND
V-
FIGURE 7.
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Document Number: 70065 S-52433--Rev. E, 06-Sep-99
DG485
Vishay Siliconix
TEST CIRCUITS
+15 V
+5 V 50 W S1
V+ VS S1 S2
VL
50 W
D 35 pF S7 S8 CLK LD DIN RS V- GND 1 kW
VO 50 W
S2 D
DG485
S3 50 W
DG485
50 W
S8 50 W
-15 V
FIGURE 8. Switching Time Test Circuit
FIGURE 9. Adjacent Input Crosstalk
TEST CIRCUITS
50 W
S1
50 W
VO
DG485
S2 50 W
50 W
S8 50 W
FIGURE 10. Off Isolation
Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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DG485
Vishay Siliconix
APPLICATIONS
CLK f LD tLOGIC tLOGIC
f= for CLK and LD inputs of the same frequency. The recommended phase delay of LD from CLK is 1/2 tLOGIC to tLOGIC: tLOGIC(MIN): 80 ns at 25_C 150 ns at 125_C V+ = 15 V V- = -15 V GND = 0 V
FIGURE 11.
DG485
C1 VREF C2 R1 DIN
DG485
IN1
RIN
R2 CLK RF
IN2
RIN
R0
R1
R2
R7 - VOUT
- +
+
FIGURE 12. Multi-Function Circuit Provides Input Selection, Gain Ranging and Filtering with One DG485
FIGURE 13. Serial DAC Circuit
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Document Number: 70065 S-52433--Rev. E, 06-Sep-99
DG485
Vishay Siliconix
APPLICATIONS
RF R - R +
V1 V2
VOUT CH
+ -
V8
R
DG485 DG485
FIGURE 14. Summing Node Mixer
FIGURE 15. Multiplexing, Sampling Application
S1 S2
S8
DG485
D
Switch Array
Octal Latch 8085
SOD
DIN
S/R
DOUT
To Next Switch Array
ALE Data Bus 8212
LD
CLK
RS
(8) (8) Address Bus Decoder 8205
WR R/S
FIGURE 16. Direct Serial Interface (8085)
Document Number: 70065 S-52433--Rev. E, 06-Sep-99
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